Stop RyuJIT from injecting thumb bit under ILC, remove ObjectWriter compensation

[MichalStrehovsky]

Should match what was done in #125421.

ILC defines ARM32 method symbols with the thumb bit (+1) set per AAELF convention. RyuJIT was also adding +1 to movw/movt label addresses, causing double-counting that ObjectWriter had to compensate for with maskThumbBitOut/maskThumbBitIn logic.

Guard the thumb bit injection in emitarm.cpp so it only applies for ReadyToRun and runtime JIT (where symbols don't carry the thumb bit), not for ILC.

Replace the maskThumbBit compensation in ObjectWriter with a simpler approach: for BRANCH24 only, strip the thumb bit from the symbol value since the encoding can't represent it. For MOV32, the symbol value (with thumb bit) flows through directly.

Cc @jakobbotsch @jkoritzinsky

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[MichalStrehovsky]

/azp run runtime-coreclr outerloop, runtime-nativeaot-outerloop

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Azure Pipelines successfully started running 2 pipeline(s).

[Copilot]

Pull request overview

This PR aligns ARM32 Thumb-bit handling between ILC and RyuJIT by preventing double-injection of the Thumb bit (+1) into relocation computations, and by simplifying ObjectWriter’s Thumb-bit adjustment logic to match AAELF expectations.

Changes:

• Update ARM32 JIT emission to only inject the Thumb bit for ReadyToRun and runtime JIT scenarios (not ILC).
• Simplify ObjectWriter relocation resolution: strip the Thumb bit only for THUMB_BRANCH24 (since the encoding can’t represent it), while letting THUMB_MOV32_PCREL flow through unchanged.

Reviewed changes

Copilot reviewed 2 out of 2 changed files in this pull request and generated no comments.

File	Description
src/coreclr/tools/Common/Compiler/ObjectWriter/ObjectWriter.cs	Removes prior mask-in/mask-out compensation and replaces it with BRANCH24-only Thumb-bit stripping during same-section relocation resolution.
src/coreclr/jit/emitarm.cpp	Guards movw/movt label Thumb-bit injection so ILC doesn’t double-count Thumb-bit-in-symbol + Thumb-bit-in-addend.

[jkoritzinsky]

I'd personally like to go the other direction (encode the CodeDelta into the reloc when needed in the ObjectDataBuilder emission in each node) so we can be consistent with R2R or come up with a solution for emitting it for R2R in the ObjectWriter.

[MichalStrehovsky]

I'd personally like to go the other direction (encode the CodeDelta into the reloc when needed in the ObjectDataBuilder emission in each node) so we can be consistent with R2R or come up with a solution for emitting it for R2R in the ObjectWriter.

AAELF requires that the symbols are defined with the THUMB bit set. ReadyToRun will have to do this too if we ever start emitting ELF binaries as R2R. So if we want to unify, we'd unify on the THUMB bit being set in the symbol definition already the way native AOT does it (i.e. not a +1 CodeDelta).

This PR just makes things consistent with how we did this in #125421 so that we don't have two different ways. With some luck, we'll drop ARM32 support before we need ELF ReadyToRun.

[MichalStrehovsky]

/azp run runtime-coreclr outerloop, runtime-nativeaot-outerloop

[azure-pipelines]

Azure Pipelines successfully started running 2 pipeline(s).

[Copilot]

Pull request overview

Copilot reviewed 2 out of 2 changed files in this pull request and generated no new comments.

[jkoritzinsky]

In that case, can we open up a follow up issue to remove the CodeDelta concept from R2R (and figure out which relocs are the ones that break there if it's added)? I want to eventually unify ObjectWriter between R2R and NAOT so that's a prerequisite at this point.

[MichalStrehovsky]

In that case, can we open up a follow up issue to remove the CodeDelta concept from R2R (and figure out which relocs are the ones that break there if it's added)? I want to eventually unify ObjectWriter between R2R and NAOT so that's a prerequisite at this point.

We track this in #125788.